Virtualization is a broad concept that can be applied to the abstraction of computer resources. An entire computer platform may be virtualized to create a Virtual Machine (VM). In such instances, a host (hardware and software) is configured to execute guest software.
In this context, memory virtualization is enabled by translating Guest Physical Addresses (GPAs) to Host Physical Addresses (HPAs). GPAs may be grouped into pages, and HPAs may be grouped into frames. Accordingly, GPA-to-HPA translations can be described in terms of page-frame translations. To facilitate page-frame translations, some page-frame mappings may be provided in Translation Lookaside Buffers (TLBs). TLBs may be implemented, for example, in CPU cache. Other page-frame mappings may be provided by Page Table Entries (PTEs) stored in system memory. To make better use of system memory, page tables are sometimes stored in a multi-level structure that requires a multi-level page-walk to complete a translation.
Known memory virtualization techniques have many disadvantages, however. For instance, conventional VM's do not provide memory virtualization to Input/Output (I/O) devices. In addition, conventional VM's cannot easily scale memory virtualization to higher bandwidth operation. Moreover, known memory virtualization approaches that are configured to operate with out-of-order memory controllers generally require a substantial number of additional gates to track out-of-order walks in a multi-level page-walk scheme. For at least the foregoing reasons, improved systems and methods are needed for memory virtualization.